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On one hand the cache line has to be read in order to be written - so cache misses on write should be as bad as those on read, but on the other the CPU shouln't stall on a write since in general it doesn't require what it's writing to proceed with the following operations.
Yes, this comes close.
If the data that you'll want to modify is in the cache, the data will be changed in the cache and later submitted to main memory (write-hit).
So subsequent reads-writes of the same data that is potentially still in the cache is cheap.
It gets a bit tricky is multithreading comes into play, though you don't seem to be concerned with that.
(See also Intel 64 and IA-32 Architectures Software Developers Manual Vol. 3A, Chapter 11)